Hardware » CANBridge

#include <unistd.h>

#include <stdio.h>

#include <stdlib.h>

#include <stdint.h>

class CMyI2c

{

   public:

      int data;

      CMyI2c()

      {

         data=0;

      }

      void setData(int i)

      {

         data=i;

      }

      void showData()

      {

         printf("Data: %d\n", data);

      }

};

struct SEeprom

{

   int info;

};

// template <typename S, CMyI2c& i2c>

template <typename S, class C>

class CTemp//: public virtual CMyI2c

{

      //virtual CMyI2c myI2c;

      //CMyI2c &myI2c;

      C& m_ref;

   public:

      //CTemp()

         // ( CMyI2c &v_i2c )

         // :v_i2c

      //CTemp(  CMyI2c &v_i2c )

      //   :myI2c(v_i2c)

      CTemp(  C& ref )

         :m_ref(ref)

      {

      }

      void showData()

      {

         m_ref.myI2c.showData();

         printf("EEPROM-Info: %d\n", m_ref.m_eeprom.info );

      }

};

// template <typename S, CMyI2c& i2c>

template <typename TSEeprom_, class TCPlatform>

class CApp: public TCPlatform

{

      //virtual CMyI2c myI2c;

      //CMyI2c &myI2c;

      //C& m_ref;

   public:

      //CTemp()

         // ( CMyI2c &v_i2c )

         // :v_i2c

      //CTemp(  CMyI2c &v_i2c )

      //   :myI2c(v_i2c)

      CApp(  )

      {

      }

      void showData()

      {

         this->myI2c.showData();

         printf("EEPROM-Info: %d\n", this->m_eeprom.info );

      }

};

CMyI2c xmyI2c;

class CPlain

{

      friend class CTemp<SEeprom, CPlain>;

   protected:

      SEeprom m_eeprom;

   public:

   CMyI2c myI2c;

   //CTemp<SEeprom, &xmyI2c> temp;

   //CTemp<SEeprom, myI2c> temp;

   CTemp<SEeprom, CPlain> temp;

   CPlain()

      //:temp(myI2c)

      :temp(*this)

   {

   }

   void setInfo( int info)

   {

      m_eeprom.info=info;

      //asm("foooo\n");

   }

   //template <class MC1>

   void templated(int i1);

};

//template <class MC1>

//template <typename MC1>

//template <class MC1>

//void MC1::templated(int i1)

void CPlain::templated(int i1)

{

   printf("Templated: %d\n", i1);

};

struct SRegEntry

{

   int addr;

   int bitStart;

   int bitSize;

   // const char *name;

   // enum entries;

};

enum ESettings: unsigned int;

typedef const char* SSettingDesctriptorTexts[6];

struct SSettingDesctriptor

{

   const SRegEntry &regEntry;

   const char *descText;

   SSettingDesctriptorTexts valueTexts;

};

#define MAX_VALUE_TEXTS    6

typedef SSettingDesctriptor SSettingDesctriptors[ ];

typedef const char** SSettingDesctriptorsI[ MAX_VALUE_TEXTS ];

template<typename T>

class CRegConfig

{

private:

      T* m_conf;

      //SSettingDesctriptor *m_descriptors;

      //SRegEntry *m_bitFieldDescriptors;

public:

      CRegConfig( int size )

         //, SRegEntry *bitFieldDescriptors)

         //:m_bitFieldDescriptors(bitFieldDescriptors)

      {

         m_conf=new uint8_t[size];

      }

      ~CRegConfig()

      {

         delete[] m_conf;

      }

      T* data()

      {

         return( m_conf );

      }

      void setSetting( const SRegEntry& regEntry, int value )

      {

         m_conf[ regEntry.addr ]=

               setBitFields(

                  m_conf[ regEntry.addr ],

                  regEntry.bitStart,

                  regEntry.bitSize,

                  value

                  );

      }

      T plainSetting( const SRegEntry& regEntry, int value )

      {

         return(

               setBitFields(

                  regEntry.bitStart,

                  regEntry.bitSize,

                  value

                  ) );

      }

      T getConfig( const SRegEntry& regEntry )

      {

         return( getBitFields(

                    m_conf[ regEntry.addr ],

                    regEntry.bitStart,

                    regEntry.bitSize

                    )

                 );

      }

      static T setBitFields( T org, T bitPos, T bitSize, T value)

      {

         T mask=(((T)-1)>>( (sizeof(T)*8) - bitSize)) << bitPos;

         return ( ( org & (~mask)) | ( (value << bitPos) & mask ) );

      }

      static constexpr T setBitFields( const T bitPos, const T bitSize, const T value)

      {

         return ( value << bitPos );

      }

      static T getBitFields( T org, T bitPos, T bitSize)

      {

         T mask=(((T)-1)>>( (sizeof(T)*8) - bitSize)) << bitPos;

         return( ( org & mask) >> bitPos );

      }

      void dumpConfig( SSettingDesctriptor *descriptors, int count )

      {

         printf("Dumping config:\n");

         for(int i1=0; i1<count; i1++)

         {

            T value=getConfig( descriptors[i1].regEntry );

            const char* desc=nullptr;

            if( value < MAX_VALUE_TEXTS )

            {

               desc=descriptors[i1].valueTexts[value];

            }

            printf("   %s: %d %s\n", descriptors[i1].descText

                   , value

                   , desc?desc:"?" );

         }

      };

};

enum ERegs

{

   RegFifo          = 0x0,

   RegOpMode        = 0x1,

   RegDataModul     = 0x2,

   RegBitRateMsb    = 0x3,

   RegBitRateLsb    = 0x4,

   RegFdevMsb       = 0x5,

   RegFdevLsb       = 0x6,

   RegFrfMsb        = 0x7,

   RegFrfMid        = 0x8,

   RegFrfLsb        = 0x9,

   RegOsc1          = 0xA,

   RegAfcCtrl       = 0xB,

   RegListen1       = 0xD,

   RegListen2       = 0xE,

   RegListen3       = 0xF,

   RegVersion       = 0x10,

   RegPaLevel       = 0x11,

   RegPaRamp        = 0x12,

   RegOcp           = 0x13,

   RegLna           = 0x18,

   RegRxBw          = 0x19,

   RegAfcBw         = 0x1A,

   RegOokPeak       = 0x1B,

   RegOokAvg        = 0x1C,

   RegOokFix        = 0x1D,

   RegAfcFei        = 0x1E,

   RegAfcMsb        = 0x1F,

   RegAfcLsb        = 0x20,

   RegFeiMsb        = 0x21,

   RegFeiLsb        = 0x22,

   RegRssiConfig    = 0x23,

   RegRssiValue     = 0x24,

   RegDioMapping1   = 0x25,

   RegDioMapping2   = 0x26,

   RegIrqFlags1     = 0x27,

   RegIrqFlags2     = 0x28,

   RegRssiThresh    = 0x29,

   RegRxTimeout1    = 0x2A,

   RegRxTimeout2    = 0x2B,

   RegPreambleMsb   = 0x2C,

   RegPreambleLsb   = 0x2D,

   RegSyncConfig    = 0x2E,

   RegSyncValue1    = 0x2F,

   RegSyncValue2    = 0x30,

   RegSyncValue3    = 0x31,

   RegSyncValue4    = 0x32,

   RegSyncValue5    = 0x33,

   RegSyncValue6    = 0x34,

   RegSyncValue7    = 0x35,

   RegSyncValue8    = 0x36,

   RegPacketConfig1 = 0x37,

   RegPayloadLength = 0x38,

   RegNodeAdrs      = 0x39,

   RegBroadcastAdrs = 0x3A,

   RegAutoModes     = 0x3B,

   RegFifoThresh    = 0x3C,

   RegPacketConfig2 = 0x3D,

   RegAesKey1       = 0x3E,

   RegAesKey2       = 0x3F,

   RegAesKey3       = 0x40,

   RegAesKey4       = 0x41,

   RegAesKey5       = 0x42,

   RegAesKey6       = 0x43,

   RegAesKey7       = 0x44,

   RegAesKey8       = 0x45,

   RegAesKey9       = 0x46,

   RegAesKey10      = 0x47,

   RegAesKey11      = 0x48,

   RegAesKey12      = 0x49,

   RegAesKey13      = 0x4A,

   RegAesKey14      = 0x4B,

   RegAesKey15      = 0x4C,

   RegAesKey16      = 0x4D,

   RegTemp1         = 0x4E,

   RegTemp2         = 0x4F,

   RegTestLna       = 0x58,

   RegTestPa1       = 0x5A,

   RegTestPa2       = 0x5C,

   RegTestDagc      = 0x6F,

   RegTestAfc       = 0x71,

};

SRegEntry RESequencerOff   { RegOpMode, 7, 1 };

namespace ESequencerOff {

enum ESequencerOff: int {

   SequencerOn= 0x0,

   SequencerOff= 0x1,

};

}

SRegEntry REListenOn       { RegOpMode, 6, 1 };

namespace EListenOn {

enum EListenOn: int {

   ListenOn= 0x1,

   ListenOff= 0x0,

};

}

SRegEntry REListenAbort    { RegOpMode, 5, 1 };

SRegEntry REMode           { RegOpMode, 2, 3 };

namespace EMode

{

enum EMode: int {

   Sleep           =0x0,

   Standby         =0x1,

   FrequencySynth  =2,

   Transmit        =3,

   Receive         =4

};

}

SRegEntry REDataMode       { RegDataModul, 5, 2 };

namespace EDataMode

{

enum EDataMode: int {

   PacketMode     =0,

   Reserved       =1,

   ContinuousWithBitSynchronizer    =2,

   ContinuousWithoutBitSynchronizer =3,

};

}

SRegEntry REModulationType { RegDataModul, 3, 2 };

namespace EModulationType

{

enum EModulationType: int {

   FSK=0,

   OOK=1,

};

}

SRegEntry REModulationShaping{ RegDataModul, 0, 2 };

namespace EModulationShaping

{

enum EModulationShaping: int {

   None=0,

   Gaussian_BT_1_0=1,

   Gaussian_BT_0_5=2,

   Gaussian_BT_0_3=3,

};

}

SRegEntry REBitRateMsb{ RegBitRateMsb, 0, 8 };

SRegEntry REBitRateLsb{ RegBitRateLsb, 0, 8 };

SRegEntry REFdevMsb{ RegFdevMsb, 0, 8 };

SRegEntry REFdevLsb{ RegFdevLsb, 0, 8 };

SRegEntry REFrfMsb{ RegFrfMsb, 0, 8 };

SRegEntry REFrfMid{ RegFrfMid, 0, 8 };

SRegEntry REFrfLsb{ RegFrfLsb, 0, 8 };

SRegEntry RERcCalStart{ RegOsc1, 7, 1};

SRegEntry RERcCalDone{ RegOsc1, 6, 1};

namespace ERcCalDone

{

enum ERcCalDone: int {

   Progress=0,

   Done=1,

};

}

SRegEntry REAfcLowBetaOn{ RegAfcCtrl, 5, 1};

namespace EAfcLowBetaOn

{

enum EAfcLowBetaOn: int {

   Standard,

   Improved,

};

}

SRegEntry REListenResolIdle{ RegListen1, 6, 2};

SRegEntry REListenResolRx{ RegListen1, 4, 2};

SRegEntry REListenCriteria{ RegListen1, 3, 1};

SRegEntry REListenEnd{ RegListen1, 1, 2};

SRegEntry REListenCoefIdle{ RegListen2, 0, 8};

SRegEntry REListenCoefRx{ RegListen3, 0, 8};

SRegEntry REVersion{ RegVersion, 0, 8};

SRegEntry REPa0On{ RegPaLevel, 7, 1};

SRegEntry REPa1On{ RegPaLevel, 6, 1};

SRegEntry REPa2On{ RegPaLevel, 5, 1};

SRegEntry REOutputPower{ RegPaLevel, 0, 5};

SRegEntry REPaRamp{ RegPaRamp, 0, 4};

SRegEntry REOcpOn{ RegOcp, 4, 1};

SRegEntry REOcpTrim{ RegOcp, 0, 4};

SRegEntry RELnaZin{ RegLna, 7, 1};

SRegEntry RELnaCurrentGain{ RegLna, 3, 3};

SRegEntry RELnaGainSelect{ RegLna, 0, 3};

SRegEntry REDccFreq{ RegRxBw, 5, 3};

SRegEntry RERxBwMant{ RegRxBw, 4, 2};

SRegEntry RERxBwExp{ RegRxBw, 0, 3};

SRegEntry REDccFreqAfc{ RegAfcBw, 5, 3};

SRegEntry RERxBwMantAfc{ RegAfcBw, 3, 2};

SRegEntry RERxBwExpAfc{ RegAfcBw, 0, 3};

SRegEntry REOokThreshType{ RegOokPeak, 6, 7};

SRegEntry REOokPeakTheshStep{ RegOokPeak, 3, 3};

SRegEntry REOokPeakTheshDec{ RegOokPeak, 0, 3};

SRegEntry REOokAverageThreshFilt{ RegOokAvg, 6, 2};

SRegEntry REOokFixedThresh{ RegOokFix, 0, 8};

SRegEntry REFeiDone{ RegAfcFei, 6, 1};

SRegEntry REFeiStart{ RegAfcFei, 5, 1};

SRegEntry REAfcDone{ RegAfcFei, 4, 1};

SRegEntry REAfcAutclearOn{ RegAfcFei, 3, 1};

SRegEntry REAfcAutoOn{ RegAfcFei, 2, 1};

SRegEntry REAfcClear{ RegAfcFei, 1, 1};

SRegEntry REAfcStart{ RegAfcFei, 0, 1};

SRegEntry REAfcValueMsb{ RegAfcMsb, 0, 8};

SRegEntry REAfcValueLsb{ RegAfcLsb, 0, 8};

SRegEntry REFeiValueMsb{ RegFeiMsb, 0, 8};

SRegEntry REFeiValueLsb{ RegFeiLsb, 0, 8};

SRegEntry RERssiDone{ RegRssiConfig, 1, 1};

SRegEntry RERssiStart{ RegRssiConfig, 0, 1};

SRegEntry RERssiValue{ RegRssiValue, 0, 8};

SRegEntry REDio0Mapping{ RegDioMapping1, 6, 2};

SRegEntry REDio1Mapping{ RegDioMapping1, 4, 2};

SRegEntry REDio2Mapping{ RegDioMapping1, 2, 2};

SRegEntry REDio3Mapping{ RegDioMapping1, 0, 2};

SRegEntry REDio5Mapping{ RegDioMapping2, 4, 2};

SRegEntry REClkOut{ RegDioMapping2, 0, 3};

SRegEntry REModeReady{ RegIrqFlags1, 7, 1};

SRegEntry RERxReady{ RegIrqFlags1, 6, 1};

SRegEntry RETxReady{ RegIrqFlags1, 5, 1};

SRegEntry REPllLock{ RegIrqFlags1, 4, 1};

SRegEntry RERssi{ RegIrqFlags1, 3, 1};

SRegEntry RETimeout{ RegIrqFlags1, 2, 1};

SRegEntry REAutoMode{ RegIrqFlags1, 1, 1};

SRegEntry RESyncAddressMatch{ RegIrqFlags1, 0, 1};

SRegEntry REFifoFull{ RegIrqFlags2, 7, 1};

SRegEntry REFifoNotEmpty{ RegIrqFlags2, 6, 1};

SRegEntry REFifoLevel{ RegIrqFlags2, 5, 1};

SRegEntry REFifoOverrun{ RegIrqFlags2, 4, 1};

SRegEntry REPacketSent{ RegIrqFlags2, 3, 1};

SRegEntry REPayloadReady{ RegIrqFlags2, 2, 1};

SRegEntry RECrcOk{ RegIrqFlags2, 1, 1};

SRegEntry RERssiThreshold{ RegRssiThresh, 0, 8};

SRegEntry RETimeoutRxStart{ RegRxTimeout1, 0, 8};

SRegEntry RETimeoutRssiThresh{ RegRxTimeout2, 0, 8};

SRegEntry REPreambleSizeMsb{ RegPreambleMsb, 0, 8};

SRegEntry REPreambleSizeLsb{ RegPreambleLsb, 0, 8};

SRegEntry RESyncOn{ RegSyncConfig, 7, 1};

SRegEntry REFifoFillCondition{ RegSyncConfig, 6, 1};

SRegEntry RESyncSize{ RegSyncConfig, 3, 3};

SRegEntry RESyncTol{ RegSyncConfig, 0, 3};

SRegEntry RESyncValue1{ RegSyncValue1, 0, 8};

SRegEntry RESyncValue2{ RegSyncValue2, 0, 8};

SRegEntry RESyncValue3{ RegSyncValue3, 0, 8};

SRegEntry RESyncValue4{ RegSyncValue4, 0, 8};

SRegEntry RESyncValue5{ RegSyncValue5, 0, 8};

SRegEntry RESyncValue6{ RegSyncValue6, 0, 8};

SRegEntry RESyncValue7{ RegSyncValue7, 0, 8};

SRegEntry RESyncValue8{ RegSyncValue8, 0, 8};

SRegEntry REPacketFormat{ RegPacketConfig1, 7, 1};

SRegEntry REDcFree{ RegPacketConfig1, 5, 2};

SRegEntry RECrcOn{ RegPacketConfig1, 4, 1};

SRegEntry RECrcAutoClearOff{ RegPacketConfig1, 3, 1};

SRegEntry REAddressFiltering{ RegPacketConfig1, 1, 2};

SRegEntry REPayloadLength{ RegPayloadLength, 0, 8};

SRegEntry RENodeAddress{ RegNodeAdrs, 0, 8};

SRegEntry REBroadcastAddress{ RegBroadcastAdrs, 0, 8};

SRegEntry REEnterCondition{ RegAutoModes, 5, 3};

SRegEntry REExitCondition{ RegAutoModes, 2, 3};

SRegEntry REIntermediateMode{ RegAutoModes, 0, 2};

SRegEntry RETxStartCondition{ RegFifoThresh, 0, 7};

SRegEntry REFifoThreshold{ RegFifoThresh, 7, 1};

SRegEntry REInterPacketRxDelay{ RegPacketConfig2, 4, 4};

SRegEntry RERestartRx{ RegPacketConfig2, 2, 1};

SRegEntry REAutoRxRestartOn{ RegPacketConfig2, 1, 1};

SRegEntry REAesOn{ RegPacketConfig2, 0, 1};

SRegEntry REAesKey1{ RegAesKey1, 0, 8};

SRegEntry REAesKey2{ RegAesKey2, 0, 8};

SRegEntry REAesKey3{ RegAesKey3, 0, 8};

SRegEntry REAesKey4{ RegAesKey4, 0, 8};

SRegEntry REAesKey5{ RegAesKey5, 0, 8};

SRegEntry REAesKey6{ RegAesKey6, 0, 8};

SRegEntry REAesKey7{ RegAesKey7, 0, 8};

SRegEntry REAesKey8{ RegAesKey8, 0, 8};

SRegEntry REAesKey9{ RegAesKey9, 0, 8};

SRegEntry REAesKey10{ RegAesKey10, 0, 8};

SRegEntry REAesKey11{ RegAesKey11, 0, 8};

SRegEntry REAesKey12{ RegAesKey12, 0, 8};

SRegEntry REAesKey13{ RegAesKey13, 0, 8};

SRegEntry REAesKey14{ RegAesKey14, 0, 8};

SRegEntry REAesKey15{ RegAesKey15, 0, 8};

SRegEntry REAesKey16{ RegAesKey16, 0, 8};

SRegEntry RETempMeasStart{ RegTemp1, 3, 1};

SRegEntry RETempMeasRunning{ RegTemp1, 2, 1};

SRegEntry RETempValue{ RegTemp2, 0, 8};

SRegEntry RESensitivityBoost{ RegTestLna, 0, 8};

SRegEntry REPa13dBm1{ RegTestPa1, 0, 8};

SRegEntry REPa13dBm2{ RegTestPa2, 0, 8};

SRegEntry REContinuousDagc{ RegTestDagc, 0, 8};

SRegEntry RELowBetaAfcOffset{ RegTestAfc, 0, 8};

SSettingDesctriptors descriptors=

{

   //------ RegOpMode

   { RESequencerOff, "Sequencer Off", {

               [ESequencerOff::SequencerOn]="Sequencer on",

               [ESequencerOff::SequencerOff]="Sequencer Off" } },

   { REListenOn,     "Listening On", {

               [EListenOn::ListenOff]="Listen Off",

               [EListenOn::ListenOn]="Listen On" } },

   { REListenAbort,  "Abort Listening", {

               "Always reads zero" } },

   { REMode,         "Operating mode", {

               [EMode::Sleep]="Sleep",

               [EMode::Standby]="Standby",

               [EMode::FrequencySynth]="Frequency Synthesizer mode",

               [EMode::Transmit]="Transmitter mode",

               [EMode::Receive]="Receiver mode" } },

   //------ RegDataModul

   { REDataMode, "Data processing mode", {

               [EDataMode::PacketMode]="Packet mode",

               [EDataMode::Reserved]="reserved",

               [EDataMode::ContinuousWithBitSynchronizer]="continuous with bit synchronizer",

               [EDataMode::ContinuousWithoutBitSynchronizer]="continuous without bit synchronizer" } },

   { REModulationType, "Modulation scheme", {

               [EModulationType::FSK]="FSK",

               [EModulationType::OOK]="OOK" } },

   { REModulationShaping, "Datashaping", {

               [EModulationShaping::None]="no shaping",

               [EModulationShaping::Gaussian_BT_1_0]="Gaussian filter, BT=1.0",

               [EModulationShaping::Gaussian_BT_0_5]="Gaussian filter, BT=0.5",

               [EModulationShaping::Gaussian_BT_0_3]="Gaussian filter, BT=0.3" } },

   //------ RegBitRateMsb, RegBitRateLsb, RegFdevMsb, RegFdevLsb, RegFrfMsb, RegFrfMid, RegFrfLsb

   { REBitRateMsb, "Bitrate MSB", {

               } },

   { REBitRateLsb, "Bitrate LSB", {

               } },

   { REFdevMsb, "frequency deviation MSB", {

               } },

   { REFdevLsb, "frequency deviation LSB", {

               } },

   { REFrfMsb, "RF carrier frequency MSB", {

               } },

   { REFrfMid, "RF carrier frequency Mid", {

               } },

   { REFrfLsb, "RF carrier frequency LSB", {

               } },

   //------ RegOsc1

   { RERcCalStart, "Triggers the calibration of the RC oscillator when set", {

               "Write only",

               } },

   { RERcCalDone, "Calibration done", {

               [ERcCalDone::Progress]="RC calibration in progress",

               [ERcCalDone::Done]="RC calibration is over",

               } },

   //------ RegAfcCtrl

   { REAfcLowBetaOn, "Improved AFC routine for signals with modulation index lower than 2", {

               [EAfcLowBetaOn::Standard]="Standard AFC routine",

               [EAfcLowBetaOn::Improved]="Improved AFC routine",

               } },

   //------ RegListenMode

   { REListenResolIdle, "Resolution of listen mode idle time", {

               "reserved",

               "64µs",

               "4.4ms",

               "262ms"

               } },

   { REListenResolRx, "Resolution of listen mode Rx time", {

               "reserved",

               "64µs",

               "4.4ms",

               "262ms"

               } },

   { REListenCriteria, "Criteria for packet acceptance in Listen mode", {

               "signal strength is above RssiThreshold",

               "signal strength is above RssiThreshold and SyncAddress matched"

               } },

   { REListenEnd, "Action taken after acceptance of packet in listen mode", {

               "chip stays in Rx mode",

               "mode defined by 'Mode'",

               "Listen mode resumes in idle state",

               "reserved",

               } },

   //------ RegListen2, RegListen3

   { REListenCoefIdle, "Duration of the idle phase in listen mode", { } },

   { REListenCoefRx, "Duration of the Rx phase in listen mode", { } },

   //------ RegVersion

   { REVersion, "Version code of the chip", { } },

   //------ RegPaLevel

   { REPa0On, "Enable PA0, connected to RFIO and LNA", { } },

   { REPa1On, "Enable PA1, on PA_BOOST pin", { } },

   { REPa2On, "Enable PA2, on PA_BOOST pin", { } },

   { REOutputPower, "Output power setting, with 1dB steps", { } },

   //------ RegPaRamp

   { REPaRamp, "Rise/Fall time of ramp up/down in FSK", { } },

   //------ RegOcp

   { REOcpOn, "Enables overload current protection for the PA", { } },

   { REOcpTrim, "Trimming of Ocp current", { } },

   //------ RegLna

   { RELnaZin, "LNAs input impedance", { } },

   { RELnaCurrentGain, "Current LNA gain", { } },

   { RELnaGainSelect, "LNA gain setting", { } },

   //------ RegRxBw

   { REDccFreq, "Cut-off frequency of the DC offset canceller", { } },

   { RERxBwMant, "Channel filter bandwidth control", { } },

   { RERxBwExp, "Channel filter bandwith control", { } },

   //------ RegAfcBw

   { REDccFreqAfc, "DccFreq parameter used during the AFC", { } },

   { RERxBwMantAfc, "RxBwMant parameter used during the AFC", { } },

   { RERxBwExpAfc, "RxBwExp parameter used during the AFC", { } },

    //------ RegOokPeak

   { REOokThreshType, "Selects type of threshold in the OOK data slicer", { } },

   { REOokPeakTheshStep, "Size of each decrement of the RSSI threshold in the OOK demodulator", { } },

   { REOokPeakTheshDec, "Period of decrement of the RSSI threshold in the OOK demodulator", { } },

   //------ RegOokAvg, RegOokFix

   { REOokAverageThreshFilt, "Filter coefficients in average mode of the OOK demodulator", { } },

   { REOokFixedThresh, "Fixed threshold value (in dB) in the OOK demodulator", { } },

   //------ RegOokAvg

   { REFeiDone, "FEI done", { } },

   { REFeiStart, "write only", { } },

   { REAfcDone, "AFC done", { } },

   { REAfcAutclearOn, "Only valid if AfcAutoOn is set", { } },

   { REAfcAutoOn, "AFC auto on", { } },

   { REAfcClear, "AFC auto clear", { } },

   { REAfcStart, "AFC Start; always 0", { } },

   //------ RegAfcMsb, RegAfcLsb, RegFeiMsb, RegFeiLsb

   { REAfcValueMsb, "MSB of the AfcValue, 2’s complement format", { } },

   { REAfcValueLsb, "LSB of the AfcValue, 2’s complement format", { } },

   { REFeiValueMsb, "MSB of the measured frequency offset, 2’s complement", { } },

   { REFeiValueLsb, "LSB of the measured frequency offset, 2’s complement", { } },

   //------ RegRssiConfig

   { RERssiDone, "Rssi done", { } },

   { RERssiStart, "Trigger a RSSI measurement when set. Always reads 0", { } },

   //------ RegRssiValue

   { RERssiValue, "Absolute value of the RSSI in dBm, 0.5dB steps.", { } },

   //------ RegDioMapping1

   { REDio0Mapping, "Mapping of pins DIO0", { } },

   { REDio1Mapping, "Mapping of pins DIO1", { } },

   { REDio2Mapping, "Mapping of pins DIO2", { } },

   { REDio3Mapping, "Mapping of pins DIO3", { } },

   { REDio5Mapping, "Mapping of pins DIO5", { } },

   //------ RegDioMapping2

   { REClkOut, "Selects CLKOUT frequency", { } },

   //------ RegIrqFlags1

   { REModeReady, "Set when the operation mode requested in Mode, is ready", { } },

   { RERxReady, "Set in Rx mode, after RSSI, AGC and AFC", { } },

   { RETxReady, "Set in Tx mode, after PA ramp-up", { } },

   { REPllLock, "Set (in FS, Rx or Tx) when the PLL is locked", { } },

   { RERssi, "Set in Rx when the RssiValue exceeds RssiThreshold", { } },

   { RETimeout, "Set when a timeout occurs", { } },

   { REAutoMode, "Set when entering Intermediate mode", { } },

   { RESyncAddressMatch, "Set when Sync and Address (if enabled) are detected", { } },

   //------ RegIrqFlags2

   { REFifoFull, "Set when FIFO is full", { } },

   { REFifoNotEmpty, "Set when FIFO contains at least one byte", { } },

   { REFifoLevel, "Set when the number of bytes in the FIFO strictly exceeds FifoThreshold", { } },

   { REFifoOverrun, "Set when FIFO overrun occurs", { } },

   { REPacketSent, "Set in Tx when the complete packet has been sent", { } },

   { REPayloadReady, "Set in Rx when the payload is ready", { } },

   { RECrcOk, "Set in Rx when the CRC of the payload is Ok", { } },

   //------ RegRssiThresh, RegRxTimeout1, RegRxTimeout2, RegPreambleMsb, RegPreambleLsb

   { RERssiThreshold, "RSSI trigger level for Rssi interrup", { } },

   { RETimeoutRxStart, "Timeout interrupt is generated (Start)", { } },

   { RETimeoutRssiThresh, "Timeout interrupt is generated (Threshold)", { } },

   { REPreambleSizeMsb, "Size of the preamble to be sent (MSB)", { } },

   { REPreambleSizeLsb, "Size of the preamble to be sent (LSB)", { } },

   //------ RegSyncConfig

   { RESyncOn, "Enables the Sync word generation and detection", { } },

   { REFifoFillCondition, "FIFO filling condition", { } },

   { RESyncSize, "Size of the Sync word", { } },

   { RESyncTol, "Number of tolerated bit errors in Sync word", { } },

   //------ RegSyncValue1...RegSyncValue8

   { RESyncValue1, "1st byte of Sync word", { } },

   { RESyncValue2, "2st byte of Sync word", { } },

   { RESyncValue3, "3st byte of Sync word", { } },

   { RESyncValue4, "4st byte of Sync word", { } },

   { RESyncValue5, "5st byte of Sync word", { } },

   { RESyncValue6, "6st byte of Sync word", { } },

   { RESyncValue7, "7st byte of Sync word", { } },

   { RESyncValue8, "8st byte of Sync word", { } },

   //------ RegPacketConfig1

   { REPacketFormat, "Defines the packet format used", { } },

   { REDcFree, "Defines DC-free encoding/decoding performed", { } },

   { RECrcOn, "Enables CRC calculation/check", { } },

   { RECrcAutoClearOff, "Defines the behavior of the packet handler when CRC check fails", { } },

   { REAddressFiltering, "Defines address based filtering in Rx", { } },

   //------ RegPayloadLength, RegNodeAdrs, RegBroadcastAdrs

   { REPayloadLength, "payload length/max length in packet mode for RX", { } },

   { RENodeAddress, "Node address used in address filtering", { } },

   { REBroadcastAddress, "Broadcast address used in address filtering", { } },

   //------ RegAutoModes

   { REEnterCondition, "Interrupt condition for entering the intermediate mode", { } },

   { REExitCondition, "Interrupt condition for exiting the intermediate mode", { } },

   { REIntermediateMode, "Intermediate mode", { } },

   //------ RegFifoThresh

   { RETxStartCondition, "Defines the condition to start packet transmission", { } },

   { REFifoThreshold, "Used to trigger FifoLevel interrup", { } },

   //------ RegPacketConfig2

   { REInterPacketRxDelay, "After PayloadReady occurred, defines the delay between FIFO empty and the start of a new RSSI phase for next packet", { } },

   { RERestartRx, "Forces the Receiver in WAIT mode, in Continuous Rx mode", { } },

   { REAutoRxRestartOn, "Enables automatic Rx restart after packet has been completely read from FIFO", { } },

   { REAesOn, "Enable the AES encryption/decryption", { } },

   //------ RegAesKey1 ... RegAesKey16

   { REAesKey1, "1st byte of cipher key", { } },

   { REAesKey2, "2nd byte of cipher key", { } },

   { REAesKey3, "3rd byte of cipher key", { } },

   { REAesKey4, "4th byte of cipher key", { } },

   { REAesKey5, "5th byte of cipher key", { } },

   { REAesKey6, "6th byte of cipher key", { } },

   { REAesKey7, "7th byte of cipher key", { } },

   { REAesKey8, "8th byte of cipher key", { } },

   { REAesKey9, "9th byte of cipher key", { } },

   { REAesKey10, "10th byte of cipher key", { } },

   { REAesKey11, "11th byte of cipher key", { } },

   { REAesKey12, "12th byte of cipher key", { } },

   { REAesKey13, "13th byte of cipher key", { } },

   { REAesKey14, "14th byte of cipher key", { } },

   { REAesKey15, "15th byte of cipher key", { } },

   { REAesKey16, "16th byte of cipher key", { } },

   { RETempMeasStart, "Triggers the temperature measurement when set", { } },

   { RETempMeasRunning, "Set to 1 while the temperature measurement is running", { } },

   { RETempValue, "Measured temperature", { } },

   //------ RegTemp1

   { RETempMeasStart, "Triggers the temperature measurement when set", { } },

   { RETempMeasRunning, "Set to 1 while the temperature measurement is running", { } },

   { RETempValue, "Measured temperature", { } },

   //------ Test registers

   { RESensitivityBoost, "High sensitivity(0x2D) or normal sensitivity mode(0x1B)", { } },

   { REPa13dBm1, "Set to 0x5D for +13 dBm operation", { } },

   { REPa13dBm2, "Set to 0x7C for +13 dBm operation", { } },

   { REContinuousDagc, "Fading Margin Improvement", { } },

   { RELowBetaAfcOffset, "AFC offset set for low modulation index systems, used if AfcLowBetaOn=1", { } },

};